The present invention relates to the field of IC chip manufacturing. More particularly, embodiments of the present invention relate to a method of back-end manufacturing IC packaged chips using an integrated automated back-end IC manufacturing assembly.
Conventional back-end IC manufacturing facilities, at contract assembly houses as well as several original equipment manufactures (OEMs), have a moderate to low level of automation and equipment integration. These lines typically require several manual steps and depend upon operator intervention for many, if not nearly all, operation, maintenance, lot management and inspection steps. Since this is typically a batch type process, there maybe a high level of work-in-progress (WIP) inventory, as well as relatively high cycle times. This type of factory management may not be suitable for manufacturing where flexibility is key, and daily operation may require several changeovers in die, package and leadframe types.
Presently, the back-end manufacturing process for ICs (i.e. from manufactured wafer to tested and packaged die) is labor intense. In order to manufacture an IC chip, in the back-end, from the initial step of wafer reception to the packaging and shipping of the finished chip, there are many personnel and specialized pieces of equipment involved. Further, the process of back-end manufacturing an IC chip is a relatively long one. The complete process typically takes anywhere from four to six weeks to obtain a final packaged chip, and generally takes on the order of 1.5 to 2 weeks when using special xe2x80x9crushxe2x80x9d or xe2x80x9chot lotxe2x80x9d procedures.
Due to the length of the back-end manufacturing process and the required manpower, IC (IC) chips are generally manufactured in batches. That is, the process of back-end manufacturing a single IC is done on a large scale with individual large batches running through discrete process steps. This large scale is utilized to, add a standard of efficiency to an otherwise complex process. For instance, a wafer that is received from an outside vendor is cut into strips. Each strip may contain approximately 200 die, and there may be 50 strips in a batch. Therefore, a typical batch of ICs, formed through a single back-end IC manufacturing process, may contain 10,000 or more IC chips.
An embodiment of a conventional batch-oriented back-end IC manufacturing process is illustrated in FIG. 1. This embodiment illustrates the length of a conventional back-end IC manufacturing process. Batches of chips move from one stage of the process to the next. In block diagram 100, the back-end manufacturing line includes front-of-line portion 100A, end-of-line portion 100B, test 128, and finish portion 100C. The back-end IC manufacturing process begins with die attach station (D/A) 110. Although a die preparation process is required, this is typically done outside front-of-line portion 100A. Furthermore, the die preparation process may take place in a different location than the rest of the back-end IC manufacturing process.
Front-of-line portion 100A includes die attach station (D/A) 110, cure station 112, plasma treatment station 114, wire bond station (W/B) 116, and another plasma station 118 typically a plasma cleaning station). The back-end IC manufacturing process includes many aspects which require human material handling stations (HM) 150. HM 150 steps are represented in FIG. 1 with arrows. These HM 150 steps include transferring the batch from one step of the process to the next, as well as between specific manual visual inspection stations (MVI) 105.
In the front-of-line portion 100A, the cure station 112 may carry out a curing process in a machine designed to heat a batch of strips to a temperature of about 150 degrees Celsius, for a period of one hour, in order to cure the glue used in the die attach step. This cure station 112 is followed by a plasma station 114 cleaning step utilizing oxygen (O2) or Argon (Ar). The next step is wire bond station (W/B) 116 followed by MVI 105. Another plasma station 118 cleaning step is done following wire bond station (W/B) 116 and another MVI 105. The plasma station 118 cleaning step is similar to plasma station 114 cleaning step, and each plasma step may last anywhere from 30 minutes to one hour.
With reference still to FIG. 1, back-end manufacturing line 100 continues with an end-of-line portion 100B where need for human interaction also exists. End-of-line portion 100B begins with mold station 120. HM 150 is utilized to move the batch through each MVI 105. The next step in end-of-line portion 100B is post mold cure station (PMC) 122. PMC 122 is a curing step which requires a temperature of 175-degree Celsius and a timeframe of approximately 5 hours. After PMC 122, the strip undergoes solder ball attach station (SBA) 124. Following SBA 124, MVI 105 takes place to ensure proper attachment of the ball to each strip in the batch. The batch is then processed through saw station 126. Saw station 126 separates the batch into individual IC chips. The final step in end-of-line portion 100B is MVI 105 of the completed saw station 126 step. Throughout the back-end manufacturing process, MVI 105 normally includes additional quality control and assurance measures.
Following the completion of end-of-line portion 100B, back-end manufacturing line 100 continues with test portion 128. In test portion 128, as illustrated in the previous portions, the need for human interaction includes human handling during both the testing, and inspecting phases.
With reference still to FIG. 1, back-end manufacturing line 100 further illustrates the final portion of the back-end IC manufacturing process. The final portion is illustrated as finish portion 100C. Finish portion 100C includes mark station 130, dry bake station 132, and tape and reel station (T/R) 134. Most significantly, dry bake station 132 is a 24-hour dry bake step performed prior to T/R 134. Dry bake station 132 is required by modern back-end IC manufacturing processes in order to meet the stringent moisture sensitivity level (MSL) 3 IC chip packaging requirements. Specifically, MSL 3 is a moisture level benchmark that meets demanding requirements placed on back-end IC manufacturers.
Therefore, in a typical back-end IC manufacturing line, a production cycle may span a period of four to six weeks. Moreover, the processing cycle may be done at the batch level which results in approximately 10,000 or more IC chips per stage. This batch level process results in a large inventory of on band IC chips. In an effort to control production overruns, a manufacturer will normally use a build-to-forecast model based on contract back-end IC manufacturing techniques.
Disadvantages of the batch level process include the large minimum order size and the long timeframe for the manufacture of a specific type of IC. For example, if a customer requests an uncommon or highly demanded type of IC, e.g., one that is not in inventory, they would typically place a special order. In this case, a small order may not be economically worthwhile. Specifically, the batch level process is generally cost prohibitive unless the customer orders a specified minimum amount of product. Further, it generally takes a minimum of four to six weeks to process a special order. Moreover, this minimum time conventionally includes time to reset and/or maintain machinery, and/or instruct inspectors on expected differences in the back-end IC manufacturing process.
Another disadvantage of the conventional batch process is the multitude of procedures using human interaction with the batch in transporting the batch from stage to stage, or during certain stages, such as visual inspection (HM). These procedures include MVI, quality assurance (QA), and handling throughout the entire back-end IC manufacturing process. Specifically, MVI typically involves a pause in the back-end IC manufacturing process so that an operator can manually inspect the IC chip after a given step. MVI is done to ensure correct part placement, proper IC shape, elimination of excess material on the IC, etc. MVI, however, is error prone because it relies on human judgment and discrimination, and it may be tedious, and may require sustained or prolonged concentration, thereby introducing difficult practice for periods of time in excess of an hour or two, or over an entire workday.
Further, upon completion of the visual inspection, a QA examination takes place to ensure the MVI was done correctly. This QA examination further delays the back-end IC manufacturing process due to an increase in overall time spent on the redundant inspection. Another detrimental aspect of the MVI process is the human handling of the strips in the batch. As an inspector analyzes a die on a strip in the batch, they may inadvertently cause a defect. Thus, an inspector looking for defects may actually be creating them.
A further problem arises in batch back-end IC manufacturing in that a relatively large number of personnel are required, e.g., personnel to move the batch from point to point, personnel for MVIS, personnel for QA inspections, and personnel to operate each of the many processes required in typical IC back-end IC manufacturing. The average processing line may easily maintain a payroll of thirty-plus personnel. Therefore, the expense required per employee must be factored into the final cost of the IC chip.
Early efforts in equipment integration and automation result in xe2x80x9cislands of automationxe2x80x9d involving some automation at an individual equipment level, but not a high level of multi-equipment integration. Individual operation steps at the level of an individual piece of equipment had been automated to some degree, but still manual inspection, as well as manual lot movement and tracking remained typical. Further improvements in equipment and software capabilities have transitioned these islands to automation cells that handle large chunks of the assembly process. Each cell is a functional area and represents part of the total operation. However, a total solution has not been presented heretofore.
Thus, a need exists for a method to integrate an IC back-end manufacturing assembly. A further need exists for a method to integrate an IC back-end manufacturing assembly, which can proficiently perform IC back-end manufacturing on a smaller scale of chips. A further need exists for a method to integrate a back-end IC manufacturing assembly which can abbreviate the MVI and QA process while maintaining a higher quality of visual inspection. Still another need exists for a method to integrate an IC back-end manufacturing assembly which requires fewer personnel to maintain a back-end manufacturing line. A further need exists for a method to integrate an IC back-end manufacturing assembly which is compatible with existing IC back-end manufacturing processes.
One embodiment of the present invention advances factory automation by implementing an advanced, fully integrated assembly and test lines capable of back-end manufacturing ball grid array (BGA) packages (for example, molded BGA packages in a matrix array). The implementation has integrated the back-end manufacturing process from die attach to tape and reel, with a reduced cycle time. This implementation enables a virtually xe2x80x9chands-freexe2x80x9d production line with automated chip movement, testing, inspection and sorting as well as automated chip assembly.
The present invention provides, in various embodiments, methods to integrate an IC chip back-end manufacturing assembly. Embodiments of the present invention also provide an integrated in-line IC back-end manufacturing assembly process, which proficiently performs IC back-end manufacturing on a smaller scale. The present invention further provides a method to integrate an IC back-end manufacturing assembly, which reduces the human-operated MVI and QA processes while maintaining a higher quality of visual inspection. The present invention also provides a method to integrate an IC back-end manufacturing assembly which requires fewer personnel on the back-end manufacturing line. The present invention further provides a method to integrate an IC back-end manufacturing assembly, which is compatible with existing IC back-end manufacturing processes.
Generally, an embodiment is directed to an integrated assembly process that automatically moves small amounts of IC chips (e.g. a die strip) through packaging stages that span from receiving the IC dies to testing the packaged chip and tape and reel assembly. Herein, the processing of IC chips in a pipeline fashion is called xe2x80x9cin-linexe2x80x9d assembly because the individual chips (in small amounts) are moved from station to station very rapidly and are not delayed in batch fashion. In-line assembly is different from batch processing, in that, small amounts of chips move through the entire assembly process of the present invention (in a pipeline fashion) from one end to another without interruption or delay associated with batch processing. Handling, testing and processing the chips are also automated processes in accordance with the present invention to reduce and/or eliminate human interactions.
Specifically, in one embodiment, the present invention processes a die-strip through a front-of-line assembly portion which comprises a plurality of sub-stations (e.g. in-line die attach, in-line cure, in-line plasma, in-line wire bond, and another in-line plasma) operating on an in-line basis. The die-strip is then automatically provided to an end-of-line assembly portion. The die-strip is then processed through an end-of-line assembly portion which comprises a plurality of sub-stations (e.g. in-line mold, in-line PMC, in-line SBA, in-line saw and in-line sort) operating on an in-line basis. The present embodiment then automatically provides the die-strip to an in-line test assembly portion. The die-strip components are then tested by the test portion and then automatically provided to a finish assembly portion. The present embodiment then processes the die-strip components through the finish portion which comprises a plurality of sub-stations (e.g. marking, final visual inspection, and tape and reel) operating on the die components. Therefore, substations of the integrated assembly line of the present invention process IC chips using an in-line approach.
In one embodiment, the various substations of the integrated in-line IC back-end manufacturing hardware are arranged in an assembly line format. Further, a software process monitors and controls the integrated in-line IC back-end manufacturing hardware. It is also appreciated that an automated reject management protocol is implemented from initial die attach through test and finish. Specifically, the reject management protocol maintains a strip process history which is updated via an electronic strip map database 620 throughout the back-end manufacturing process using comprehensive strip level tracking procedure. The updates to the electronic strip map database 620 are received through a network hierarchy including automated visual camera technology, integrated cell controllers, and an overall back-end manufacturing execution system. These elements virtually eliminate human manual intervention in the inspecting, testing and sorting of IC chips.
In one embodiment, a universal packaging process is applied to the in-line assembly line back-end manufacturing process. Specifically, universal packaging utilizes the in-line subassemblies in conjunction with the integrated software processes to increase throughput time of a specific package size. A further benefit is realized with the streamlined transition of subassembly back-end manufacturing specifications from one package size to another. In general, aspects of universal packaging allow package changeovers with minimal changeover times, thus allowing some amount of flexibility within package families. For example, in one embodiment, an exemplary changeover in the entire line from a 7 mmxc3x977 mm package to any other package size may take less than thirty minutes.